AMD Claims Rack-Scale CPU Advantage Over Nvidia And Intel For Agentic AI Workloads

AMD has published performance projections arguing its EPYC server processors deliver significantly more usable compute capacity than competing chips from Nvidia and Intel when measured at the rack level under realistic power constraints.

The company’s analysis focuses on a modelled 100 kW rack scenario, a common power envelope in modern data centres, and compares how much practical service capacity different processor configurations can deliver across six enterprise and service-oriented workloads.

Under that framework, AMD claims its current-generation EPYC 9965 processor delivers an estimated 2.37 times the rack-level throughput of Nvidia’s Vera CPU, while its next-generation EPYC “Venice” chip is projected to extend that advantage to 3.30 times.

Intel’s Xeon 6980P sits between the two at 1.46 times the Nvidia Vera baseline, according to AMD’s modelling.

Why AMD Is Talking About Racks, Not Chips

The framing of AMD’s argument is deliberate. Rather than comparing individual processor performance, the company is making the case that data centre operators should evaluate CPUs based on how much useful work fits inside a power-constrained rack.

AMD contends that component-level benchmarks describe a chip but do not describe what a customer can actually deploy. Data centres are provisioned in racks bounded by fixed power and thermal budgets, finite floor space and software compatibility requirements.

The company argues this rack-level view is particularly relevant for agentic AI deployments, where production systems depend not just on GPU-based model inference but on a range of CPU-bound supporting services including orchestration logic, transactional databases, web and API endpoints, key-value stores, in-memory caches and middleware.

These services scale with the number of concurrent AI agents rather than the size of any single model, AMD argues, making general-purpose CPU capacity the factor that sets the ceiling on how many agents an enterprise can run.

The Numbers AMD Is Claiming

AMD’s analysis covers six workloads: general-purpose computing (SPECrate 2017 integer), server-side Java, web serving using NGINX, key-value store operations using Redis, in-memory caching using Memcached and relational database performance using TPROC-C on MySQL.

All configurations were normalised to a modelled 100 kW rack built on dual-socket platforms.

The geometric mean of rack-level performance across all six workloads, normalised to Nvidia Vera as 1.0, came out at 1.46 for Intel Xeon 6980P, 2.37 for AMD EPYC 9965 and 3.30 for AMD EPYC Venice.

Individual workload results varied. AMD’s current EPYC 9965 scored highest relative advantages in in-memory caching at 2.49 times and server-side Java at 2.93 times the Nvidia baseline. Its narrowest advantage was in the SPECrate 2017 integer benchmark at 1.60 times.

Intel’s Xeon 6980P performed strongest in server-side Java at 2.34 times and relational databases at 1.99 times the Nvidia baseline, but fell below Nvidia in the in-memory caching workload at 0.93 times.

How AMD Derived The Estimates

AMD’s methodology document reveals that the Nvidia Vera performance figures used as the baseline are themselves estimates rather than measured results.

Because Vera systems are not yet widely available for independent testing, AMD derived Vera’s projected performance by scaling up from Nvidia Grace Superchip results using a 1.63 times multiplier. That scaling factor was based on the overall geometric mean of test results from a Phoronix benchmark review published in May 2026.

AMD’s own EPYC 9965 figures are based on published AMD testing and internal benchmarks. The EPYC Venice projections are estimated at approximately 1.7 times the performance of the current EPYC 9965, based on SPECrate 2017 integer base results and internal testing.

The rack-level calculations then multiply estimated single-node performance by the number of nodes that fit within the 100 kW power budget for each platform. Because higher-power nodes mean fewer nodes per rack, the relationship between per-node performance and rack density becomes the key variable.

AMD’s modelling shows the EPYC 9965 and Intel Xeon 6980P platforms both fit approximately 85 per cent as many nodes per rack as Nvidia Vera, while the higher-power EPYC Venice fits roughly 71 per cent as many nodes. However, the per-node performance advantages more than compensate for the reduced node count in AMD’s analysis.

The company acknowledges that because the estimates rely on published results, internal measurements and projection-based scaling factors, they are intended to provide directional comparison rather than direct measured rack benchmarks.

Core Density As A Competitive Metric

AMD is also emphasising raw core density per rack as a differentiator.

The company states that a current AMD EPYC Turin deployment in liquid-cooled rack infrastructure supports more than 27,000 CPU cores per rack today. The next-generation EPYC Venice is architected to scale beyond 36,000 cores in the same rack class.

By comparison, Nvidia Vera at 88 cores per socket in a dual-socket configuration supports approximately 22,500 cores per rack under AMD’s modelling.

AMD notes that cores and Nvidia’s “sandboxes” are not directly equivalent but argues the comparison provides a directional measure of rack-scale compute density.

Per-Core Performance Claims

Beyond rack-level throughput, AMD also makes claims about per-core performance for its upcoming Venice processors.

The company estimates that a 64-core Venice CPU would deliver 27 per cent higher performance per core than the 88-core Nvidia Vera processor, based on SPECrate 2017 integer base projections. Even at a higher 96-core configuration, Venice is projected to deliver 11 per cent higher per-core performance than Vera.

AMD positions this as relevant for workloads such as databases, analytics, simulations and host processing in multi-GPU server environments where single-threaded or lightly-threaded performance matters.

The x86 Compatibility Argument

A recurring theme in AMD’s positioning is the practical advantage of x86 software compatibility.

Nvidia’s Vera processor is based on an Arm architecture, meaning enterprises adopting it would need to validate and potentially port their existing software stacks. AMD argues its EPYC processors run on the x86 ecosystem that enterprises already operate, preserving software continuity and reducing migration friction.

AMD states its deployments run on standard liquid-cooled data centre equipment with no new rack architecture required, which the company frames as shortening the path from planning to production.

Context And Caveats

The analysis is produced by AMD and presented from AMD’s perspective. The Nvidia Vera figures are estimates derived from scaling existing Grace Superchip benchmarks rather than direct measurements of Vera hardware. The EPYC Venice figures are also projections for a product that has not yet shipped.

Independent third-party rack-level benchmarks comparing all four platforms under identical conditions are not yet available.

The workload suite AMD selected focuses on infrastructure services rather than AI model inference, which is the domain where Nvidia’s GPU-based platforms are primarily positioned. AMD’s argument is specifically about the CPU-bound layers that support agentic AI systems, not about the AI compute itself.

AMD is hosting its Advancing AI 2026 event on 22-23 July in San Francisco, where it is expected to provide further details on its agentic AI infrastructure positioning.

Last Updated on June 16, 2026 by Nick Ross